hdlmake.tools.iverilog package

Module contents

Module providing support for IVerilog (Icarus Verilog) simulator

class hdlmake.tools.iverilog.ToolIVerilog

Bases: hdlmake.tools.make_sim.ToolSim

Class providing the interface for Icarus Verilog simulator

CLEAN_TARGETS = {'clean': ['run.command', 'ivl_vhdl_work', 'work'], 'mrproper': ['*.vcd', '*.vvp']}
HDL_FILES = {<class 'hdlmake.srcfile.VerilogFile'>: '', <class 'hdlmake.srcfile.VHDLFile'>: '', <class 'hdlmake.srcfile.SVFile'>: ''}
SIMULATOR_CONTROLS = {'compiler': 'iverilog $(IVERILOG_OPT) -s $(TOP_MODULE) -o $(TOP_MODULE).vvp -c run.command', 'vhdl': 'echo $< >> run.command', 'vlog': 'echo $< >> run.command'}
STANDARD_LIBS = ['std', 'ieee', 'ieee_proposed', 'vl', 'synopsys']
TOOL_INFO = {'id': 'iverilog', 'linux_bin': 'iverilog', 'name': 'Icarus Verilog', 'windows_bin': None}